The first patent addresses an architecture of a MVDC circuit breaker. This patent introduces a time-controlled resistor module in the auxiliary circuit. This module short-circuits a resistor ‘R1’ by closing a by-pass switch ‘MS1’ for controlling the insertion time to limit the rate-of-change of current at its zero crossing and ensuring a fast interruption. It contributes to a compact and cost-efficient DCCB.
The other patent introduces an architecture of a HV DCCB based on the previous MV DCCB architecture. It exploits the phenomenon that a current commutation from a surge arrestor ’MOV1’ to a capacitor ’C2’ can generate an extended recovery period ‘∆t’ without arc to secure the interruption of current. It avoids the use of HV inductor and reduces the volume of HV capacitor.
Interruption validated over full current range on prototype.