Tests are carried out on two different series-connected switches made of six SiC MOSFETs capable of blocking 10 kV and 20 kV respectively. High voltage capacitors are connected to the drain terminals of the MOSFETs to emulate the common mode currents’ paths due to parasitic capacitances of the packaging. Due to high dV/dt, common mode currents become dangerous to the switch as they unset-tle the voltage sharing during turn-off and unbalance switching losses. This could lead some of the MOSFETs to experience avalanche breakdown. A novel packaging approach that suppresses or bal-ances the common mode currents is introduced.
Cedric Mathieu de Vienne, Besar Asllani, Hugo Reynes, Martin Guillet,
Amin Al-Hinai, Pierre Lefranc, Pierre-Olivier Jeannin, Bruno Lefebvre, Cyril Buttay, Till Huesgen
Presented at PCIM 2023