Electric field computation for HVDC GIS/GIL spacer under superimposed impulse conditions
Electric field computation
for HVDC GIS/GIL spacer under superimposed impulse conditions
This paper evidences the influence of different parameters on the electric field on DC spacers in GIS/GIL and thus their dielectric withstand under S/IMP tests. A notable difference in term of electric field can be observed in function of impulse polarity, load condition (with/without heating current) and insulating material’s properties. For example, an overstress of 0.3pu was obtained on spacer’s surface in case of superimposed impulse test with opposite impulse polarity, high load condition and high leakage current in gas. Contrary to AC system where the simple LI tests were enough, S/IMP tests with both impulse polarity, ZL and HL conditions are mandatory to verify the insulating performance of HVDC GIS/GIL spacer. This paper gives a better understanding of the electric field distribution in HVDC GIS/GIL and helps for the design and tests.
T. Vu-Cong, F. Jacquier and A. Girodet
Conference on Electrical Insulation and Dielectric Phenomena – CEIDP